收藏本站
Chapter 1: What’s New for Release 13.1
Partial Reconfiguration Support
PlanAhead provides an interface to Partial Reconfiguration with appropriate licensing.
See the Partial Reconfiguration User Guide (UG702), for more information.
Project Navigator Project File (.xise) Support
The New Project wizard lets you specify an ISE project file without requiring the
specification of all project sources. PlanAhead parses the XISE project file, and adds RTL
and simulation sources, including CORE Generator cores and Block Memory Model
(BMM) files. PlanAhead can now also determine relevant run options for Synthesis and
Implementation tools, and configure the default run to match based on settings in the XISE
project file.
New and Modified Project Management Features
The following subsections describe the new and modified features in PlanAhead 13
projects. In PlanAhead 13, you can:
?
?
?
?
?
?
?
?
?
Import sources from Project Navigator
Automatically or manually order source files for proper compilation by XST
automatically discover the top-module name
better support for `include statements inside HDL
support for XST Synthesis XCF constraint files
Identification of unused source files
Ability to launch Runs without copying sources to the Run directory
Ability to archive a project
Ability to customize the Text Editor font
Graphical User Interface Enhancements
The PlanAhead software for release 13 has further enhanced the “layered complexity” of
the Graphical User Interface (GUI) to provide an intuitive environment for both new and
advanced users.
The left-side panel of the interface is a “Flow Navigator,” exposes a push-button flow from
Project Management, through RTL Design, Netlist Design, Implemented Design, to Device
Programming and Debugging. The new integration with ISim provides timing and
behavioral simulation, which are exposed where appropriate for use in the Flow Navigator
menu options. A new information window as well as an enhanced Tcl Console and
Messaging window is available.
Other Enhancements
?
?
?
?
?
?
?
GUI Enhancement Details
RTL Design Additions and Modifications
Additional ChipScope Features
Pin Planning Changes
New and Modified Design Rule Checks
Implementation Enhancements
New 13.1 PlanAhead Video Tutorial
14
www.xilinx.com
ISE Design Suite 13: Release Notes Guide
UG631 (v 13.1)
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
EF-EDK-FL SOFTWARE EDK EMBED FLOAT
EF-ISE-DSP-FL SOFTWARE ISE DSP EDITION
EF-ISE-SYSTEM-FL ISE DESIGN SYST FLOATING LICENSE
EF-VIVADO-HLS-FL VIVADO HLS, FLOATING LICENSE
EFM32-GXXX-PTB BOARD PROTOTYPING FOR EFM32
EFS315 FUSE INDUST 315A 415V BS IEC
EHBNCSCB CONN EH BNC T/H SOLDER CUP BLK
EHE004 BOARD ENERGY HARVESTING
相关代理商/技术参数
EF-DSP-PC-NL 功能描述:SOFTWARE SYS GEN FOR DSP RoHS:是 类别:编程器，开发系统 >> 软件 系列:ISE® 设计套件 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384
EFDSS645B25A 制造商:Panasonic Industrial Company 功能描述:DELAY LINE
EFDST645B15B 制造商:Panasonic Industrial Company 功能描述:DELAY LINE
EFE01A 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01A-F 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01A-S 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01A-SE 制造商:未知厂家 制造商全称:未知厂家 功能描述:THYRISTOR MODULE|BRIDGE|HALF-CNTLD|CC|200V V(RRM)
EFE01B 制造商:CRYDOM 制造商全称:Crydom Inc., 功能描述:Power Modules